AIDAinnova

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Published December 22, 2022 | Version v1
Journal article Open

Edge-TCT evaluation of high voltage-CMOS test structures with unprecedented breakdown voltage for high radiation tolerance

Creators

  • 1. University of Liverpool
  • 2. University of Liverpool, Fondazione Bruno Kessler

Description

This paper presents the edge Transient Current Technique (eTCT) measurements of passive test-structures on the UKRI-MPW0 pixel chip, a 280 µm thick proof-of-concept High Voltage-CMOS (HV-CMOS) device designed and fabricated in the LFoundry 150 nm technology node with a nominal substrate resistivity of 1.9 kΩ cm. Samples were irradiated up to 1 × 1016 1 MeV neq cm−2 with neutrons to observe the change in depletion depth and effective doping concentration with irradiation. A depletion depth of the sensor was found to be ≈50 µm at ≈−400 V at 1 × 1016 1 MeV neq cm−2. A stable damage introduction rate (gc) was also calculated to be 0.011 ± 0.002 cm−1.

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Edge-TCT evaluation of high voltage-CMOS test.pdf

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Additional details

Funding

AIDAinnova – Advancement and Innovation for Detectors at Accelerators 101004761
European Commission