Memory Optimization Techniques in Neural Networks: A Review
Creators
- 1. Department of Computer Science, R. V College of Engineering, Bengaluru (Karnataka), India.
- 2. Assistant Professor, Department of Computer Science, R. V College of Engineering, Bengaluru (Karnataka), India.
Contributors
- 1. Publisher
Description
Deep neural networks have been continuously evolving towards larger and more complex models to solve challenging problems in the field of AI. The primary bottleneck that restricts new network architectures is memory consumption. Running or training DNNs heavily relies on the hardware (CPUs, GPUs, or FPGA) which are either inadequate in terms of memory or hard-to-extend. This would further make it difficult to scale. In this paper, we review some of the latest memory footprint reduction techniques which would enable faster low model complexity. Additionally, it improves accuracy by increasing the batch size and developing wider and deeper neural networks with the same set of hardware resources. The paper emphasizes on memory optimization methods specific to CNN and RNN training.
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Additional details
Related works
- Is cited by
- Journal article: 2249-8958 (ISSN)
Subjects
- ISSN
- 2249-8958
- Retrieval Number
- 100.1/ijeat.F29910810621