Conference paper Open Access
Girbal, Sylvain; Le Rhun, Jimmy
The safety critical industry is considering a shift from single-core COTS to multi-core COTS processors for safety and time critical computers in order to maximize performance while reducing costs. In a domain where time predictability is a major concern due
to the regulation standards, multi-core processors are introducing new sources of time variations due to the electronic competition
when the software is accessing shared hardware resources, and characterized by timing interference. The solutions proposed in the literature to deal with timing interference are all proposing a trade-off between performance efficiency, time predictability and intrusiveness in the software. Especially, none of them is able to fully exploit the multicore efficiency while allowing untouched, already-certified legacy software to run. In this paper, we introduce and evaluate BB-RTE, a Budget- Based RunTime Engine for Mixed & Safety Critical Systems, that especially focuses on mixed critical systems. BB-RTE aims at guaranteeing the deadline of high-critical tasks 1) by computing for each shared hardware resource a budget in terms of extra accesses that the critical tasks can support before their runtime is significantly impacted; 2) by temporarily suspending low-critical tasks at runtime once this budget has been consumed.