Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies
Creators
- 1. Univ. Lyon, Ecole Centrale de Lyon, INSA Lyon, Universite Claude Bernard Lyon 1, CPE Lyon, CNRS, INL
- 2. Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA, 38000 Grenoble, France
- 3. Hewlett Packard Labs, HPE Belgium, B-1831 Diegem, Belgium, 4Ghent University - imec, Gent, Belgium
- 4. Ghent University - imec, Gent, Belgium
- 5. CEA-LETI, Grenoble, France
- 6. Politecnico di Torino, Control and Computer Eng. Department, Torino, Italy
Description
The field of neuromorphic computing has been rapidly evolving in recent years, with an increasing focus on hardware design and reliability. This special session paper provides an overview of the recent developments in neuromorphic computing, focusing on hardware design and reliability. We first review the traditional CMOS-based approaches to neuromorphic hardware design and identify the challenges related to scalability, latency, and power consumption. We then investigate alternative approaches based on emerging technologies, specifically integrated photonics approaches within the NEUROPULS project. Finally, we examine the impact of device variability and aging on the reliability of neuromorphic hardware and present techniques for mitigating these effects. This review is intended to serve as a valuable resource for researchers and practitioners in neuromorphic computing.
Files
Pavanello2023_VTS_arxiv.pdf
Files
(1.2 MB)
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