Published May 30, 2021 | Version v1
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Reduction of Power in General Purpose Processor Through Clock-Gating Technique

  • 1. Professor, Department of ECE, PACE ITS(Autonomous), Ongole (Andhra Pradesh), India.
  • 2. Professor, Department of ECE, Chalapathi Institute of Technology, Guntur (Andhra Pradesh), India.
  • 3. Assoc. Professor, Department of ECE, Chalapathi Institute of Technology, Guntur (Andhra Pradesh), India.
  • 4. Professor, Department of ECE, KCIT, Markapur (Andhra Pradesh), India.
  • 1. Publisher


Now a days DC power supply plays very important role in the Electronic industry because for every electronic gadget DC power is required to operate it. Even though durable DC batteries are available in the market to operate the various electronic gadgets for more time, electronic designers are continuously concentrating more and more to reduce the power through the various new Technologies like increasing parallel operations, pipe line concepts [1] etc. To work such durable batteries more duration than the actual duration what they can give, in this work we are concentrating on the 'clock-gating' technique to reduce the power in the general purpose microprocessor. For every microprocessor clock is required. All operations of any processor are performed by the clock cycle. There are various blocks in the processor but all the blocks are not operated at a time while using it, some blocks in the off mode while other blocks are in the working mode. Hence in order to power off such blocks for a little while clock gating is used in this work. Wherever particular block is not operated, for that block clock is disabled by the clock gating technique. The main principle of clock getting is nothing but ANDing the processor clock with a gate-control signal.



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Journal article: 2277-3878 (ISSN)


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