Compact Modeling of through-silicon-vias with different ground configurations

We herein present an S-parameter based equivalent circuit implementation for performing CAD-oriented RF simulations of through-silicon-vias (TSVs) in SPICE. In this regard, the accurate representation of TSVs in silicon dies exhibiting different conductivity and varying number of ground vias used as the return path is achieved. We also present an equivalent circuit that can be cascaded to represent TSVs passing through several chips, provided that the transition bumps are included in the model. The proposal shows advantages over directly using tabular S-parameters, and substantially reduces the simulation time when compared with 3D electromagnetic solvers.