On the Design of an Object Detection System using Embedded Reconfigurable Logic: Lessons Learned

Due to the need to move deep learning computation to the edge, the organizers of the Design Automation Conference (DAC) have launched several editions of the System Design Contest (SDC), focusing on the implementation of neural networks on embedded hardware featuring an FPGA. We describe our approach and gained experience participating in the 2020 edition of the DAC SDC contest, which targets a neural network based object detection algorithm.