abstractPIM: Bridging the Gap Between Processing-In-Memory Technology and Instruction Set Architecture
Description
The von Neumann architecture, in which the memory
and the computation units are separated, demands massive
data traffic between the memory and the CPU. To reduce data
movement, new technologies and computer architectures have
been explored. The use of memristors, which are devices with
both memory and computation capabilities, has been considered
for different processing-in-memory (PIM) solutions, including
using memristive stateful logic for a programmable digital PIM
system. Nevertheless, all previous work has focused on a specific
stateful logic family, and on optimizing the execution for a
certain target machine. These solutions require new compiler
and compilation when changing the target machine, and provide
no backward compatibility with other target machines. In this
paper, we present abstractPIM, a new compilation concept and
flow which enables executing any function within the memory,
using different stateful logic families and different instruction set
architectures (ISAs). By separating the code generation into two
independent components, intermediate representation of the code
using target independent ISA and then microcode generation
for a specific target machine, we provide a flexible flow with
backward compatibility and lay foundations for a PIM compiler.
Using abstractPIM, we explore various logic technologies and
ISAs and how they impact each other, and discuss the challenges
associated with it, such as the increase in execution time.
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