A Generic Low-Level Solver for NP-Hard Instances (N=63) on Commodity 64-Bit Silicon Breaking the Tractability Barrier:
Authors/Creators
Description
⚠️ Author’s Note (Language and Tooling Disclosure)
The author is a native Spanish speaker. A Large Language Model (LLM) was used exclusively for academic translation, grammar, and formatting, with the sole purpose of communicating the results clearly and efficiently to the international research community.
All algorithmic design, implementation, experimental methodology, and results are entirely human-derived and original.
Abstract / Description
This work presents and validates a silicon-native computational architecture for addressing NP-Hard optimization problems, with a specific focus on the Hamiltonian Path Problem on directed (unilateral) graphs, which constitute one of the most restrictive and computationally demanding problem classes due to asymmetric edge constraints and reduced combinatorial symmetry.
Unlike conventional approaches that treat the CPU as a high-level software execution platform, the proposed system models the processor as a physical substrate of logic gates, leveraging strictly bitwise operations and hardware-level nondeterminism arising from real silicon behavior.
Key Results
• Execution Performance
Directed Hamiltonian Path instances with N = 63
(search space ≈ 10⁸⁷) were solved in 0.116 seconds on a standard commercial mobile processor.
• Algorithmic Mechanism
The method incorporates hardware race conditions, capacitive noise, and L1 cache timing jitter as controlled entropy sources to facilitate escape from local optima, effectively exploiting non-ideal physical characteristics of silicon rather than abstract randomness.
• Problem Class
All reported results correspond to directed (unilateral) graphs, which are strictly harder than undirected variants due to directionality constraints and reduced path equivalence.
• Implementation and Portability
The implementation is written in pure C / C-style C++, requires zero dynamic memory allocation, and is suitable for deployment on bare-metal microcontrollers, embedded platforms, and DSP architectures with limited memory availability.
Reproducibility and Review
The author welcomes independent verification, critical review, and replication attempts.
All feedback is appreciated.
✉️ Contact: lctrnc1@gmail.com
Notes
Technical info
HFP FINAL VALIDATION PROTOCOL (Safe Mode)
Threads: 2
Primary Implementation: C / C-style C++
Cross-check Implementation: Julia (Google Colab — Free tier)
Validation Level (Easy) | D = 0.8
✔ Result: Execution completed successfully in 0.1395 s
Warm-Up Level (Intermediate) | D = 0.5
✔ Result: Execution completed successfully in 0.0008 s
✔ Sub-millisecond execution achieved
Note: Minor technical limitations were encountered in the Julia implementation related to density-sweep execution, which affected extended parameter exploration but did not impact result correctness.
Files
PiroloHFP_Generic_Solver_2026_v9.pdf
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Additional details
Software
- Repository URL
- https://zenodo.org/uploads/18627662
- Programming language
- C , C++