Flip-chip bonded micro-thermoelectric coolers for on-chip thermal management of integrated photonic devices

Abstract 

Thermal management is a key challenge in high-density photonic integrated circuits, where local hotspots destabilize the wavelength of the photonic device and degrade overall performance. Unlike conventional cooling strategies, micro-thermoelectric coolers (micro-TECs) offer a compact, solid-state, CMOS-compatible solution for localized, on-chip cooling and precise thermal management. In this work, micro-TEC devices are fabricated on Si/SiO2 substrate using electrodeposited n-type Bi2Te3 and p-type CuSbTe thermoelectric materials. The 4.4 × 4.4 mm²-sized devices comprise n- and p-type thermoelectric leg-pairs with a 150 × 150 μm² cross-sectional area and 13 μm height, which are electrically connected by top and bottom Au interconnects via a flip-chip bonding approach. The fabricated devices achieve net cooling of ~1.2 K at 100 mA and 0.71 K at 75 mA at room temperature. Results indicate that high electrical contact resistance at the bonding interfaces limits the cooling performance. Further, COMSOL simulations predict a net cooling of 6.18 K when the leg height is increased to 60 μm and the contact resistivity is reduced to 10-11 Ω.m2. This study provides quantitative design guidelines for micro-TEC interfaces and geometry and demonstrates the feasibility of direct micro-TEC integration onto silicon platforms for on-chip thermal management of photonic components.