Published September 20, 2016 | Version v1
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Oscillation test results for different Vdd values at positions X10Y90 and X44Y108

Authors/Creators

  • 1. KU Leuven

Description

16 files (X10Y90_X_XXV.bin and X44Y108_X_XXV.bin), where X_XX refers to the value of Vdd = oscillation counts generated by a TERO TRNG at placements X10Y90 and X44Y108 on a Xilinx Spartan 6 FPGA, with different voltage levels. Used in above mentioned paper in Figure 3.

Files

data-MWSCAS-KUL.zip

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Additional details

Related works

Is supplement to
10.5281/zenodo.154591 (DOI)

Funding

European Commission
HECTOR - HARDWARE ENABLED CRYPTO AND RANDOMNESS 644052