HiDALGO2 D3.2 Scalability, Optimization and Co-Design Activities
Authors/Creators
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NIKAS, KONSTANTINOS
(Researcher)1
- Anastasiadis, Petros (Researcher)1
- Kulczewski, Michal (Researcher)2
- Szeliga, Wojciech (Researcher)2
- Laura, Leydi (Researcher)3
- Torres, Luis (Researcher)
- Rivera, Angela (Researcher)3
- Caballero, David (Researcher)3
- Cladellas, Javier (Researcher)4
- Chabannes, Vincent (Researcher)4
- et al. Show all 17 authors
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NIKAS, KONSTANTINOS
(Researcher)1
- Anastasiadis, Petros (Researcher)1
- Kulczewski, Michal (Researcher)2
- Szeliga, Wojciech (Researcher)2
- Laura, Leydi (Researcher)3
- Torres, Luis (Researcher)
- Rivera, Angela (Researcher)3
- Caballero, David (Researcher)3
- Cladellas, Javier (Researcher)4
- Chabannes, Vincent (Researcher)4
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Prud'homme, Christophe
(Researcher)4
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Környei, László
(Researcher)5
- Zikeli, Michael (Researcher)6
- Horváth, Zoltán (Researcher)5
- Pinçon, Philippe (Researcher)4
- Doshi, Rahil (Researcher)6
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Lawenda, Marcin
(Researcher)2
Description
This deliverable presents the current status of scalability, performance optimization, and co-design activities across all HiDALGO2 pilot applications on EuroHPC JU systems. It builds upon D3.1 and focuses on improvements made during the second part of the project (M13-M28). Its main objective is to evaluate how the pilots behave on different HPC architectures, identify performance bottlenecks, and prepare the applications for extreme-scale benchmarking going into the third part of the project.
Compared to D3.1, this deliverable analyses a new pilot (MTW) that has been added to HiDALGO2, extends benchmarks to new systems, introduces larger and more complex scenarios, and explores cross-platform portability through co-design and profiling activities. In addition, profiling tools such as Score-P and Cube have been applied to gain deeper insights into code-level performance and highlight dominant communication or I/O bottlenecks. These insights are now guiding code restructuring and optimization efforts, including potential improvements in MPI load balancing, communication overlap, and memory usage.
In conclusion, D3.2 confirms that most pilots have reached a mature benchmarking phase, scaling well to thousands of cores. However, further work is still required to improve communication efficiency, I/O handling, and portability across heterogeneous systems. These aspects will be the focus of follow-up activities in regards to benchmarking and optimization.
Files
HiDALGO2_D3.2 Scalability, Optimization and Co-Design Activities_v1.0.pdf
Files
(4.9 MB)
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