Published April 25, 2017 | Version v1
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FPGA BASED SDR FOR DPLL APPLICATION

Description

To design and develop a system on chip reconfigurable modules Field Programmable Gate Array (FPGA) provides a way with high performance. In this paper, FPGA architecture is proposed, which would be a starting point for developing an efficient Software Defined Radio (SDR) architecture for recovering audio signals from digitally modulated frequency wave. At the modulator and demodulator sections, a Digital Frequency Generator (DFG) is applied for generating the carrier wave by exploiting the quarter wave symmetry of sine or cosine waves with dynamic range of more than 90dB.

https://journalnx.com/journal-article/20150288

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