Published May 21, 2023 | Version v1
Conference paper Open

Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays

Authors/Creators

  • 1. Imec

Description

We report on the first demonstration of multilevel multiply accumulation operations in 2T1C cell arrays based on amorphous IGZO TFTs for efficient analog in memory compute (AiMC) implementation. Device designs for the read and write transistors to meet the target specifications are discussed and implemented. Multilevel operations are realized thanks to the long retention time enabled by the ultra-low off current (< 1.5×10^-19 A/μm) of the a-IGZO TFTs.

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2023_IMW_IGZO_ML_SS_Zenodo.pdf

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Additional details

Funding

European Commission
ANDANTE - Ai for New Devices And Technologies at the Edge 876925