Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction
Creators
- 1. ETH Zurich
- 2. Intel Labs
- 3. LIRMM, Univ. Montpellier, CNRS
Description
Hermes is a speculative mechanism that accelerates long-latency off-chip load requests by removing on-chip cache access latency from their critical path. The key idea behind Hermes is to: (1) accurately predict which load requests might go to off-chip, and (2) speculatively start fetching the data required by the predicted off-chip loads directly from the main memory in parallel to the cache accesses. Hermes proposes a lightweight, perceptron-based off-chip predictor that identifies off-chip load requests using multiple disparate program features. The predictor is implemented using only tables and simple arithmetic operations like increment and decrement.
Files
CMU-SAFARI/Hermes-v1.0.0-rc1.zip
Files
(2.2 MB)
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Additional details
Related works
- Is supplement to
- https://github.com/CMU-SAFARI/Hermes/tree/v1.0.0-rc1 (URL)