Best Practice Guide - Modern Accelerators
Creators
- 1. University of Porto, Portugal
- 2. BSC, Spain
- 3. HPC2N, Sweden
- 4. WCSS, Poland
- 5. HLRS, Germany
- 6. University of Luxembourg, Luxembourg
- 7. JSC, Germany
- 8. LRZ, Germany
Description
Hardware accelerators are special types of elements designed for boosting the performance of certain application regions requiring large amounts of numerical computations. Several factors contributed to broadening the use and furthering the adoption of these technologies in High-Performance Computing (HPC). One of such is the offered greater computational throughput as compared to stand-alone Central Processing Units (CPUs), which is driven by the highly parallel architectural design of accelerators. This is particularly important in the current era of ever-increasing computational demands featuring high reuse rates of compute-intensive operational patterns. Another contributing factor is that these specialized chips are also capable of delivering much higher compute performance as compared to CPUs under the same power budget, making these technologies even more appealing for system vendors and users. All these led HPC manufacturers and integrators to unleash further the potential of hardware accelerators for delivering the required compute performance more efficiently. In fact, this is one of the main reasons that the current Top500 list continues to be enriched with various accelerated systems.
Files
Best-Practice-Guide-Modern-Accelerators.pdf
Files
(9.9 MB)
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