Journal article Open Access

Design a Low Power and High Speed 130nm Fulladder using Exclusive-OR and Exclusive-NOR Gates

SoniyaNuthalapati; P.V.Sai Ranjitha; Kalapala Radhika Rani; Lingisetty Lourdu Sasi Rekha; Sirisha Mekala; FirdosiaParveen Mohammad

Blue Eyes Intelligence Engineering and Sciences Publication

This literature illustrates the high speed and low power Full Adder (FADD) designs. This study relates to the composited structure of FADD design composed in one unit. In this the EXCL-OR/EXCL-NOR designs are used to design the FADD. Mostly concentrates on high speed standard FADD structure by combining the EXCL-OR/EXCL-NOR design in single unit. We implemented two composite structures of FADD through the full swing EXCL-OR/EXCL-NOR designs. And the EXCL-OR/EXCL-NOR design is done through pass transistor logic (PTL) and the same design projected on the composited FADD design. Such that the delay, area of the design, power requirement for the circuit gets optimized. The two composited FADD designs are compared and reduced the constraints of power requirement, area, delay and the power delay product (PDP). The simulated outcomes are verified through 130nnm CMOS mentor graphics tool. 

Files (927.6 kB)
Name Size
927.6 kB Download
Views 26
Downloads 16
Data volume 14.8 MB
Unique views 19
Unique downloads 16


Cite as