Published July 30, 2021
| Version v1
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A Reduced Switch Count Seven Level Symmetrical Inverter with Low Distortion
Creators
- 1. Pursuing MTech, Department of Power Electronics, Raghu Institute of Technology (Autonomous), Visakhapatnam (Andhra Pradesh), India.
- 2. Assistant Professor, Department of EEE, Raghu Institute of Technology (Autonomous), Visakhaptanam (Andhra Pradesh), India.
Contributors
- 1. Publisher
Description
Various types of new structures in multilevel inverters are evolving day by day. One among those is the reduced switch count type multilevel inverters. This inverter consists of low number of switches, gate driver components, and other switches like auxiliary switches. Depending on the value of the voltage sources we have symmetrical and asymmetrical multilevel inverters. In this paper, the seven level symmetrical inverter design is shown for seven levels in its output. The output voltage waveform is plotted and its FFT is performed and the THD values are shown. The inverter is simulated in SIMULINK software.
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Additional details
Related works
- Is cited by
- Journal article: 2277-3878 (ISSN)
Subjects
- ISSN
- 2277-3878
- Retrieval Number
- 100.1/ijrte.B60320710221