Poster Embargoed Access
Charles Prouveur; Matthieu Haefele; Nils Voss
FPGA devices used in the HPC context promise an increased energy efficiency, enhancing the computing systems Flop/W rate. This work compares an FPGA and a CPU implementation of a conjugate gradient solver in terms of both time to solution and energy to solution metrics. The starting point is MetalWalls, a molecular dynamics code developed at Sorbonne University in Pr. M. Salanne's team, capable of computing accurately the charge and discharge cycles of supercapacitors (energy storing devices). In the context of the H2020 EXA2PRO project, a miniapp has been derived from the F90 pure MPI production code, extracting the core of the electrostatic computation. The FPGA version has been implemented with the Data Flow Engine (DFE) software toolchain developed by Maxeler. Additionally, since FPGAs can perform arithmetic operations with any number of bits instead of the "standard" 32 or 64 bits, the miniapp could be further accelerated using optimised custom number formats. Thanks to an accuracy analysis based on the CADNA tool and comparisons with quadruple precision runs, this acceleration could be achieved without decreasing the computed solution accuracy. Finally, the original CPU and the developed FPGA implementations could be compared on Juelich Computing Centre computing systems.
Files are currently under embargo but will be publicly accessible after July 6, 2022.