Published October 5, 2020 | Version v1
Conference paper Open

A Medium Voltage AC and DC Distributed Power Generation Testbed Deploying Transient Loads

  • 1. Univ. of Texas at Arlington (UTA), Arlington, TX USA
  • 2. Naval Surface Warfare Center - Philadelphia, Philadelphia, PA USA

Description

Microgrids have been studied considerably over the last decade. They are being uniquely designed and controlled in a variety of applications to supply countless different loads, many of which may operate in a transient manner. Given their isolated nature, ships are often treated as microgrids allowing much of the same theory to apply. Historically, both electric grids and ships have relied upon fossil fuel powered motors to spin generators that source the electric power they need. Microgrids can deploy a host of different distributed generation sources that are interconnected and controlled in real time to improve overall grid reliability and redundancy. The use of medium-voltage-direct-current (MVDC) power distribution is one possible solution to minimize power loss in the conductors and to reduce the power conversion requirement when high voltage loads are present. The non-continuous operation of loads may introduce harmonics into the power system that severely impact power quality. Avoiding this is critical and more must be understood for successful mitigation. Model development and validation is critical for successfully deploying new architectures and control strategies. To study the reliable operation and control of such a power system, as well as to validate the models being developed, the Pulsed Power and Energy Laboratory (PPEL) at the University of Texas at Arlington (UTA) has designed and installed a testbed that can be used to study a small microgrid deploying transient loads. The testbed, operating at power levels higher than 300 kW, utilizes distributed AC and DC power sources and loads operating at the 480 VAC, 4160 VAC, 1 kVDC, 6 kVDC, and 12 kVDC, respectively. The testbed is being virtually extended utilizing a hardware in the loop (HIL) simulator. This paper will discuss the design of the testbed, the test plan methodology, and the results collected so far.

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