Neuromorphic Computing in High Energy Physics

At particle colliders, more data are produced than what the experiments can store for further analysis. 
This is why the incoming collisions are processed in real time by a so-called trigger system. At the 
Large Hadron Collider (LHC), trigger systems are structured as a combination of two hierarchical 
layers: the first trigger level (or L1 trigger) operates with latency of O(10 μec), selecting the ~100K 
events/sec to be passed to the second stage. The second stage, called high-level trigger, runs a faster 
and coarser version of the offline reconstruction, to select the final 1000 events to be stored for 
analysis. The L1 trigger selection algorithms are deployed as signal processing through electronic 
circuits, usually implemented though ASICs or FPGAs. The HLT runs on a CPU farm, supposed to be 
powered by GPUs or FPGAs in the future. 

Recently, an effort to deploy neural network on the L1 FPGAs was started, resulting in a Deep-learning-
to-FPGA firmware deployment (HLS4ML) being developed specifically for low-latency inference. This 
is only the first step into an R&D program aiming to explore new computing architecture to process 
LHC data in real time. In this respect, we are interested to explore emerging technologies for fast 
inference. Neuromorphic chips are clearly part of this R&D program, being a natural environment to 
implement Spiking Neural Networks (SNNs).  

Neuromorphic computing is an interesting candidate for signal processing at the High-Luminosity LHC, 
the next stage of the LHC upgrade (scheduled to start in 2025). For HL-LHC, existing particle detectors 
will be upgraded, that will allow to take a time-sequence of snapshots for a given collision. This 
additional information will allow to separate the signal belonging to the interesting collision from those 
generated parasitic collisions occurring at the same time (in-time pileup) or before/after the interesting 
one (out-of-time pileup). By powering the LHC real-time processing with SNNs, one could be able to 
apply advance and accurate signal-to-noise discrimination algorithms in real time, without affecting the 
overall system latency beyond the given tolerance.  

We propose to investigate the potential of SNNs deployed on neuromorphic chips as a technological 
solution to increase the precision of the upgraded CMS detector for HL-LHC. This includes the 
characterization of a particle type (classification) based on the recorded features or image 
representation. These information can be used to solve a classic LHC problem and eventually lead to 
determine whether a particle belongs to the interesting collision or to one of the parasitic events. The 
study is based on simulations and real data collected during tests at particle beams, collected in the 
context of the upgrade studies for the CMS detector.