Accelerating PNG Encoding in Hardware

The objective of this work is to develop
an Intellectual Property (IP) subsystem for Portable
Network Graphics (PNG) encoders, capable of operating
at 30 frames per second (FPS) with the Video Graphics
Array (VGA) standard when embedded system on chip
hardware. The developed IP subsystem comprises an
ARM Cortex A9 CPU running at 667 MHz, coupled
with a hardware IP module that implements the
LZ77 algorithm, running at 100 MHz. The LZ77
compression step is the most time consuming of the
tasks involved in the encoder when done in software,
and the LZ77 hardware module accelerates its execution
by a factor of 40 when compared with the software-only
implementation running on the ARM system. The
operation of the LZ77 IP is similar to that of a content-
addressable memory, which is a well known technique
to implement dictionaries in hardware. The proposed
solution is implemented on an FPGA board, using a
Xilinx Zynq 7000 device. Although the LZ77 IP has
achieved 82.2 fps in VGA, thus exceeding the objective
set for this work (30 fps) by roughly two times, the
whole PNG encoder is only capable of achieving 3.5 fps,
which is three times thrice as fast as its software-only
implementation. For the encoder to be capable of
operating at 30 fps, other functions need hardware
acceleration as well, such as the input image filter, the
entropy coder, and the bit stream packer. Additionally,
the whole software base needs significant optimizations
for that to be possible.