Noise-induced Performance Enhancement of Variability-aware Memristor Networks

Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.