Templated dewetting of single-crystal sub-millimeter-long nanowires and on-chip silicon circuits

Large-scale, defect-free, micro- and nano-circuits with controlled inter-connections represent
the nexus between electronic and photonic components. However, their fabrication over large
scales often requires demanding procedures that are hardly scalable. Here we synthesize
arrays of parallel ultra-long (up to 0.75 mm), monocrystalline, silicon-based nano-wires and
complex, connected circuits exploiting low-resolution etching and annealing of thin silicon
films on insulator. Phase field simulations reveal that crystal faceting and stabilization of the
wires against breaking is due to surface energy anisotropy. Wires splitting, inter-connections
and direction are independently managed by engineering the dewetting fronts and exploiting
the spontaneous formation of kinks. Finally, we fabricate field-effect transistors with state-ofthe-
art trans-conductance and electron mobility. Beyond the first experimental evidence of
controlled dewetting of patches featuring a record aspect ratio of 1/60000 and selfassembled
mm long nano-wires, our method constitutes a distinct and promising approach
for the deterministic implementation of atomically-smooth, mono-crystalline electronic and
photonic circuits.