Published May 31, 2018 | Version v1
Journal article Open

http://aircconline.com/ijnsa/V10N3/10318ijnsa03.pdf

  • 1. Research Scholar, V T U RRC, Belagavi, Karnataka, India
  • 2. Principal, B N M Institute of Technology, Bangalore, Karnataka, India

Description

Nowadays, several techniques are implemented for the cryptosystems to provide security in communication systems. The major issues detected in conventional methods are the weakness against different attack, unacceptable data expansion, and slow performance speed. In this paper, a method Dual-port Read Only Memory-Carry Select Adder-Quantitative Trait Loci (DROM-CSLA-QTL) is introduced, which utilizes lower area than the existing method. The proposed system is implemented using DROM-CSLA, which occupies less area. The DROM-CLSA-QTL algorithm is implemented using tools such as MATLAB and Model Sim. Further for FPGA implementation, Virtex 4, Virtex 5 and Virtex 6 devices are used to determine the number of Lookup Tables (LUTs), slices, flip-flops, area and frequency. Mean, Variance and Covariance are evaluated in the MATLAB.
 

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