Journal article Open Access


Hemlata Dalmia; Sandeep Kumar

DSP has become a key component, in many of the user, communications, medical and industrial products which implement the processing of signal using microprocessors, Field Programmable Gate Arrays (FPGAs), Custom ICs etc. Fast Fourier transform (FFT) has an important role in many digital signal processing (DSP) systems. E.g., in orthogonal frequency division multiplexing (OFMD) communication systems, FFT and inverse FFT are needed. The OFMD technique has become a widely adopted in several wireless communication standards. When operating in wireless environment the devices is usually to be powered using battery and, therefore, an energy efficient FFT implementation is needed. Signal processing concepts are often presented in a very mathematical and abstract format. This can discourage students from further exploration because of the apparent irrelevance to real world problems. In this paper, VLSI architecture for FFT algorithm is proposed. This architecture is authorized in Verilog language .Behavior simulation is done by using the Model Sim 6.0. PAR Simulation can be done by using the synthesis Xilinx ISE 10.1.

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  • 1. Despain, Alvin M. "Very Fast Fourier Transform Algorithms Hardware for Implementation," IEEE Trans. On Computers, Vol. 28, No. 5, pp. 333-341,1979. 2. Patli, Sudhir Subhashchandra. "Hardware Implementation of a Radix-4 Fast Fourier Transform Technique with Improved Two-Tone Resolution for Electronic Warfare Applications." PhD diss., Wright State University, Dayton, August 2004. 3. Tsui, James Bao-Yen. "Digital Techniques for Wideband Receivers," IEEE Tans. on Microwave Theory and Techniques, Vol. 45, No. 12, December 1997. 4. Sarathy, Vivek. High Spurious-Free Dynamic Range Digital Wideband Receiver for Multiple Signal Detection and Tracking, MS Thesis, Wright State University, Dayton, OH, December 2007. 5. Tsui, James Bao-Yen. Digital Techniques for Wideband Receivers, (Second Edition). Norwood, MA, Artech House, Inc., 2001. 6. Xilinx System Generator v2.1 for Simulink User's Guide. Online, ions/dsp_comm/xilinx_ref/guide.pdf. 7. Spezio, Anthony E. "Electronic Warfare Systems," IEEE Transactions on Microwave Theory and Techniques, Vol. 50, No. 3, pp. 633-644, March 2002. 8. Harris, Fredric J., Chris Dick, and Michael Rice. "Digital receivers and transmitters using polyphase filter banks for wireless communications." IEEE transactions on microwave theory and techniques, Vol. 51, No. 4, pp. 1395-1412, 2003. 9. Xilinx Virtex-4 FPGA Overview. Online, /virtex4/overview.htm 10. Fowler, Kim. "Analog-to-Digital Conversion in Real-Time Systems," IEEE Instrumentation and Measurement Magazine, September 2003. 11. D. Pok, C.-I. H. Chen, J. Schamus, C. Montgomery and J. B. Y. Tsui, "Chip Design for Monobit Receiver," IEEE Trans. Microwave Theory and Techniques, Vol. 45, No. 12, pp. 2283-2295, December 1997. 12. Laxman P. Thakre, Suresh Balpande, Umaeh Akare, Sudhair Lande 2010, " Performance evaluation and Synthesis of Multiplier Used in FFT Operation Using conventional and Vedic Algorithm", International Conference on emerging trends in Engineering and Technology, 614-619. 13. Kaustubh M. Gaikwad, Mahesh S. Chavan "Vedic Mathematics for Digital Signal Processing Operations: A Review" International Journal of Computer Applications (0975 – 8887), Vol .113 – No. 18, March 2015

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