DESIGN OF LOW POWER CARRY SKIP ADDER USING DTCMOS
Creators
- 1. Faculty of Electronics and Communication Engineering,Vel Tech,Chennai,Tamilnadu,India
- 2. Faculty of Electrical and Electronics Engineering,Vel Tech Multitech Dr. Rangarajan Dr. Sakunthala Engineering College,,Chennai,Tamilnadu,India
- 3. UG Student of Electronics and Communication Engineering,Vel Tech,Chennai,Tamilnadu,India
Description
In the domain of VLSI design, the adders are always meant to be the most fundamental requirements for processors of high performance and other multicore devices. It is found that power dissipation is a major problem in the electronic devices. Power management integrated circuit (PMIC) is emphasized as battery-powered portable electronics such as smart phone are commonly used. In this paper we are designing a carry skip adder which consumes less power than the other conventional adders using dynamic threshold complementary metal oxide semiconductor (DTCMOS).Tthe circuit is designed using tanner EDA simulator of 32nm technology. Also the circuit is compared with the CMOS technology methods.
Files
10.21307_ijssis-2017-252.pdf
Files
(646.4 kB)
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