Published December 1, 2016 | Version v1
Journal article Open

Iris: An optimized I/O stack for low-latency storage devices

  • 1. Institute of Computer Science, FORTH (ICS) and Department of Computer Science, University of Crete, Greece
  • 2. Institute of Computer Science, FORTH (ICS)


System software overheads in the I/O path, including VFS and file system code, become more pronounced with emerging low-latency storage devices. Currently, these overheads constitute the main bottleneck in the I/O path and they limit efficiency of modern storage systems. In this paper we present a taxonomy of the current state-of-the-art systems on accelerating accesses to fast storage devices. Furthermore, we present Iris, a new I/O path for applications, that minimizes overheads from system software in the common I/O path. The main idea is the separation of the control and data planes. The control plane consists of an unmodified Linux kernel and is responsible for handling data plane initialization and the normal processing path through the kernel for non-file related operations. The data plane is a lightweight mechanism to provide direct access to storage devices with minimum overheads and without sacrificing strong protection semantics. Iris requires neither hardware support from the storage devices nor changes in user applications. We evaluate our early prototype and we find that it achieves on a single core up to 1:7 and 2:2 better read and write random IOPS, respectively, compared to the XFS and EXT4 file systems. It also scales with the number of cores; using 4 cores Iris achieves 1:84 and 1:96 better read and write random IOPS, respectively. In sequential reads we provide similar performance and in sequential writes we are about 20% better compared to other file systems.


A previous version of this paper appeared in Michela Taufer, Bernd Mohr, Julian M. Kunkel (Eds.): High Performance Computing, LNCS 9945, ISC High Performance 2016 International Workshops ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P3MA, VHPC, WOPSSS Frankfurt, Germany, June 19–23, 2016, Revised Selected Papers.



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10.1007/978-3-319-46079-6_44 (DOI)


ExaNeSt – European Exascale System Interconnect and Storage 671553
European Commission