Published September 11, 2021
| Version v1.6.0
Software
Open
stnolting/neorv32: v1.6.0
Authors/Creators
- 1. Hochschule Wismar
- 2. @vestas-wind-systems
- 3. ENSTABretagne
Description
This list shows the main core changes since the last release. See the project's changelog for more information.
:bug: Bug Fixes- fixed bug in
mretinstruction (caused an exception if user mode was not implemented) - fixed missing
flash_sdi_iin Radiant-related example setups and processor wrappers
- :warning: removed
USER_CODEgeneric and according SYSINFO register - :warning: removed custom
mzextCSR; moved all information flags to newSYSINFO_CPUregister in SYSINFO module - :warning: removed
mstatus.SDandmstatus.FSCSR flags - added new designated test setups:
rtl/test_setups, :books: UG: General Hardware Setup - fixed
Zifenceitest ofriscv-arch-testport - added flags to SYSINFO module to check
FAST_SHIFT_ENandFAST_MUL_ENgenerics by software - :sparkles: added support for RISC-V
Zbbextension (basic bit-manipulation operations); support via intrinsic library
Merged pull requests:
- #136 [proposal] add rtl/test_setups
- #137 Move osflow examples
- #139 Added AlhambraII and ULX3S boards
- #142 split rtl/templates folder
- #143 SYSINFO documentation fixups
- #144 [setups] add terasic cyclone v starter kit
- #149 [setup/osflow/boards/index.mk] do not set GHDL_PLUGIN_MODULE unconditionally
Closed issues:
- #128 Do we really need wrappers for the top entity?
- #132 Cannot fit on XC6SLX9
- #135 Missing documentation and Makefiles for iCE40 and ECP5 Lattice FPGAs
- #138 common/common.mk : 144 main.elf Error 1
- #148 Windows workflow keeps failing
Files
stnolting/neorv32-v1.6.0.zip
Files
(5.6 MB)
| Name | Size | Download all |
|---|---|---|
|
md5:7ad49e25fe5d9863584d6773625a83e3
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5.6 MB | Preview Download |
Additional details
Related works
- Is supplement to
- https://github.com/stnolting/neorv32/tree/v1.6.0 (URL)