Published October 17, 2026 | Version v1

Core Readout Hardware and Semiconductor Implementation Roadmap for the Decimal Photonic Continuous Computer

Description

This paper proposes a core optical readout hardware scheme for the decimal photonic continuous computer. Two oppositely oriented zero-bias weak PN junctions form a Twin Directional Settlement Cell, designed to convert optical directional responses into discrete digital states through independent material thresholds. Drawing on zero-bias tunnel detection, 1550 nm germanium photodetectors, and localized junction fabrication in two-dimensional semiconductors, the paper outlines an implementation pathway from dual-junction experimental verification to monolithic semiconductor integration. The proposed architecture provides a testable hardware approach for connecting continuous optical relational computation with discrete digital settlement.

Files

Core Readout Hardware and Semiconductor Implementation Roadmap for the Decimal Photonic Continuous Computer.pdf