Enhanced Passive Reader-Writer (EPRW) Locks for Userspace Poll-Mode Datapaths

Passive reader-writer locks (PRW locks), introduced by Liu, Zhang, and Chen (USENIX ATC’14), achieve

excellent read-path scalability by avoiding atomic operations on the reader fast path. The original algorithm was

designed for OS kernel environments where inter-processor interrupts (IPIs) are available: when a writer advances

the global version, it sends IPIs to any cores whose per-core version counters have not yet caught up, and those

cores update their versions immediately in the IPI handler. Adapting the PRW lock to userspace eliminates this

mechanism. Without IPIs, every thread within the lock’s registered scope—including threads that are entirely

idle with no pending lock operation—must proactively call a heartbeat function to advance its version counter or

risk blocking writers indefinitely. In poll-mode packet processing environments such as DPDK, where lcores run

tight, deterministic forwarding loops, this obligation is both pervasive and fundamentally incompatible with lcore

programming discipline.

We present the Enhanced Passive Reader-Writer (EPRW) lock, an adaptation of the PRW lock for userspace

poll-mode datapaths that eliminates the heartbeat requirement entirely. We prove the correctness of the EPRW

lock, analyze its memory ordering requirements, and demonstrate that it preserves all progress guarantees of the

original algorithm while adding support for lock upgrade, downgrade, and non-blocking acquisition—operations

absent from the original design and necessary for production userspace use.

Copyright Notice © 2026 Versa Networks. All rights reserved.