Published August 14, 2026
| Version v1
Thesis
Open
Design, Verification, FPGA prototyping and ASIC implementation of MIPI D-phy physical layer
Description
MIPI D-PHY is a high-speed physical-layer interface used to transmit digital data between devices, commonly between an image sensor/camera and a processor or display.
In short, it:
Converts parallel digital data into high-speed serial data.
Transmits data over differential D+ / D− lanes.
Supports high-speed (HS) and low-power (LP) operating modes.
Provides the physical signaling layer for protocols such as MIPI CSI-2 and DSI.
Files
D_PHY_Thesis_2025 .pdf
Files
(10.9 MB)
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