Published June 24, 2026 | Version 2.0.1

Constraint-as-Code: Deterministic LLM Governance via Buddhist Doctrinal Classification and Physical Circuit Breaking (約束即代碼:基於佛教判教與物理熔斷的確定性 LLM 治理)

  • 1. Top-Celestial Company Ltd.,

Description

Large Language Models (LLMs) inherently suffer from unpredictable hallucination problems, which constitute a fundamental barrier in domains demanding extreme rigor. This research initially focused on developing an AI Buddhist reasoning system; however, we discovered that traditional prompt constraints and Retrieval-Augmented Generation (RAG) methods cannot reliably suppress the model’s tendency to fabricate scriptures or misinterpret doctrines. To solve this problem, drawing inspiration from the ancient Indian and Chinese Buddhist tradition of “Panjiao (Doctrinal Classification),” we propose the Constraint-as-Code methodology. This approach translates the Doctrinal Classification mechanism into machine-verifiable hard constraint contracts (Vajra Contract), and utilizes C Foreign Function Interface (C-FFI) technology to establish a physical circuit breaker (Physical Circuit Breaker) at the binary execution layer. When the LLM’s output violates the contract boundaries, the system directly triggers thread termination (Thread Panic) on the CPU side, rather than relying on probabilistic semantic judgments. We further
generalize this core mechanism into the DROS (Deterministic Runtime Operating System) microkernel architecture, making it applicable to any AI Agent scenario requiring deterministic governance. In our prototype evaluation, DROS successfully intercepted all simulated hallucination violations and unauthorized privilege escalations, while the latency overhead of pure CPU-side verification was negligible compared to LLM inference time.
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大型語言模型(LLM) 先天存在不可預測的幻覺(Hallucination) 問題,這在要求極端嚴謹性的領域中構成根本性障礙。本研究最初致力於開發一套AI 佛法推理系統,然而我們發現,傳統的提示詞約束與RAG 方法無法有效壓制模型捏造經文或曲解教義的傾向。為解決此問題,我們借鑑了古印度與中國佛教的「判教(Doctrinal Classification) 」傳統,提出了Constraint-as-Code 方法論:將判教機制轉化為機器可驗證的硬性約束契約(Vajra Contract),並透過C-FFI (CForeign Function Interface) 技術在二進位執行層建立物理熔斷點(Physical Circuit Breaker) 。當LLM 的輸出違反契約邊界時,系統直接在CPU 端觸發執行緒終止(Thread Panic),而非依賴機率性的語意判斷。我們進一步將此核心機制泛化為DROS (Deterministic Runtime Operating System) 微核心架構,使其適用於任何要求確定性治理的AIAgent 應用場景。在原型評估中,DROS 成功攔截了所有測試的幻覺違規與越權行為,且其純CPU 端驗證的延遲開銷相較於LLM 推論時間微乎其微。

Notes (English)

1. Microkernel Integration: Generalized the core FFI panic mechanism to align with the DROS microkernel design framework.
2. Implementation Specs: Updated C-FFI boundary interception descriptions to match latest compile-time Vajra DSL schemas.

Notes (English)

Corrected author's English name spelling from 'Jui-Cheng Chen' to 'Chun-Cheng Chen' to align with official academic registration and passport details. No modifications were made to the core research content. (更正作者英文姓名拼音,由 'Jui-Cheng Chen' 改為 'Chun-Cheng Chen',以與官方學術註冊及護照資訊對齊。核心研究內容無任何變動。)

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Related works

Is supplement to
Software: 10.5281/zenodo.20764666 (DOI)