"A Novel Multiprecision Multiplier Architecture Based on Modified Frequency Scaling Method"

In this paper, we present a multiprecision (MP) reconfigurable multiplier that incorporates variable precision, parallel processing (PP), razor-based dynamic voltage scaling (DVS), and MP operands scheduling are used to provide a variety of operating conditions. In Previous paper the PLL used for the frequency division. If use the PLL for frequency division its hardware complexity increases. To decrease the hardware complexity and also speed is increases are done by software using some frequency division methods. The reconfigurable multiplier can either work as independent smaller-precision multipliers or work in parallel to perform higher-precision multiplications. To operate at the proper precision and frequency the user's require to configure a dynamic voltage/frequency scaling management unit.