Published December 15, 2025
| Version v0.1
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vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures
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Description
Artifacts for "vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures", ASPLOS'26
Files
TUM-DSE/vCXLGen-v0.1.zip
Files
(1.0 kB)
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md5:71425077adb3dfd41dc6cf131fc5d4ac
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Additional details
Related works
- Is supplement to
- Software: https://github.com/TUM-DSE/vCXLGen/tree/v0.1 (URL)
Software
- Repository URL
- https://github.com/TUM-DSE/vCXLGen