Exploiting highly heterogeneous systems with stencil applications

While CPUs, GPUs, and FPGAs present particular advantages for different classes of High Performance Computing Applications, Iterative Stencil Loop (ISL) is a class of parallel applications with efficient implementations for all of them. Thus, this class is an interesting case of use to test the potential of using simultaneously different classes
of heterogeneous devices.

EPSILOD is a parallel skeleton framework designed to easily program and deploy ISL applications on heterogeneous platforms. It provides a programming abstraction and a transparent coordination system to work with different types of devices.

In this work, we improve EPSILOD and its performance portability layer to support key features for developing and operating optimized kernels on FPGAs. The new EPSILOD version allows the execution of efficient stencil programs simultaneously on CPUs, GPUs, and FPGA accelera tors. We discuss how to test the computing power of each different device and use this information in an EPSILOD data-partition policy to obtain a balanced load distribution across them. We present an experimental study using a classical heat-transfer stencil example in a highly heterogeneous system to show the efficiency of EPSILOD programs when using a CPU, a GPU, and an FPGA simultanously.