DiffTest-H: Toward Semantic-Aware Communication in Hardware-Accelerated Processor Verification
Authors/Creators
- 1. Institute of Computing Technology, Chinese Academy of Sciences
- 2. University of Chinese Academy of Sciences
- 3. Beijing Institute of Open Source Chip
Description
Artifacts of MICRO 2025 "DiffTest-H: Toward Semantic-Aware Communication in Hardware-Accelerated Processor Verification".
DiffTest-H is an open-source, hardware-accelerated co-simulation framework for processor verification. It deploys the Design Under Test (DUT) on Palladium or FPGA, while comparing its instruction-level architectural state with a golden reference model (REF) on host server. The artifact includes all code and workflow of DiffTest-H to demonstrate FPGA/Palladium-based simulation speed.
Latest version at Github: OpenXiangShan/xs-env at micro2025-ae
Files
DiffTest-H-artifacts-v3.zip
Files
(924.3 MB)
| Name | Size | Download all |
|---|---|---|
|
md5:a119ec270104c819b14e2de5e11a3e68
|
924.3 MB | Preview Download |
Additional details
Software
- Repository URL
- https://github.com/OpenXiangShan/xs-env.git
- Development Status
- Active