Published May 26, 2025 | Version v1
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Race Ya! An Accelerator-Native I/O Pipeline for HDF5

  • 1. ROR icon Nvidia (United States)

Description

GPUs and similar accelerators have become the dominant compute platform for STEM applications, from finance to space flight, and beyond. However, HDF5 continues to execute exclusively on the Host CPU of GPU nodes. This talk will present a design overview of moving the I/O pipeline filters, datatype conversions and other transforms from the CPU to the GPU, including how to perform I/O directly from GPU memory. Implementation details of the revised transform pipeline will be included, along with projected performance benefits.

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HDF5-AccNatIOPipe.pdf

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Video/Audio: https://youtu.be/x3A57kOaUO0?si=1JcsVpnqfEgRm_b0 (URL)