Conversores Integrados Híbridos: Passive-Stacked 3 RD Order (PS3) Boost

Power management integrated circuits (PMICs), in the form of DC/DC converters, play a significant role in today's market due to their wide range of applications in the electronics industry. Among the hybrid converter topologies that meet this demand, the Passive-Stacked 3rd Order (PS3) buck stands out, achieving 98.8% efficiency when fully integrated into an IC.

The objective of this work is to design and analyze a new topology: the PS3 boost. For this purpose, three circuit topologies were implemented using Cadence Virtuoso Studio software with 130 nm BICMOS technology.

The three proposed topologies use two small 270 nH inductors, two capacitors (0.47 μF), and two or four nFET switches. The converters were demonstrated through simulations using an input voltage of Vin = 1.8 V, a switching frequency of fsw = 6.5 MHz, and a maximum output current of Iout = 1 A.

Considering conduction and switching losses, the topologies achieved efficiency greater than 80% with output voltages up to 3 V and currents ranging from 0.5 to 2 A. The converters have an estimated area of 0.0025 mm² with a maximum efficiency of 94.1%.

Therefore, the results demonstrate the feasibility of applying the PS3 boost topology, as well as its advantages in reducing passive component size and minimizing losses in on-chip topologies.