Published February 5, 2025 | Version v1
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Design of Packaging of Power DMOS Transistor

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Additional details

Identifiers

DOI
10.1109/ASDAM63148.2024.10844597

Related works

Has version
10.1109/ASDAM63148.2024.10844597 (DOI)

Funding

European Commission
FastLane – Boosting the European Value Chain for Sustainable Power Electronics 101139788

Dates

Accepted
2024-11-14

References

  • Vogt, F. et al., in Proceedings of 9th Int. Symp. Power Semiconductor Devices and IC's, Weimar, Germany 1997.
  • Williams, R. K. et al. IEEE Tran. on Electron Devices, 64, 3, 692, 2017.
  • Chvala, A. et al., IEEE Trans. on Electron Devices, 64, 1, 333, 2017.
  • COMSOL Multiphysics® v. 6.1 www.comsol.com.
  • Jang, H.G, et al., in Proceedings of Int. Conf. on Electronics, Information, and Communication ICEIC, Jeju, Korea (South), 2021.