Configurations of one-time calibrated FDDA for selected parameters verification

This work deals with different simulation configurations for verifying the function of a one-time digitally calibrated fully-differential difference amplifier (FDDA) designed in 130nm CMOS technology. In terms of calibration, the compensated parameter is in this case, the input offset voltage VIN OF F . Specific FDDA
configurations based on open (OL) and closed (CL) feedback loops are presented here for simulation of parameters such as frequency and phase responses,
VIN OF F , CMRR and PSRR parameters. Individual simulation configurations are divided into universal (pre-calibration) and post-calibration ones. In the case of CL,
the effect of small-signal output resistance of the FDDA on its DC gain is analyzed through circuit model, which has to be considered in the low-voltage design.