Characterization procedure for 28nm UTBB FD-SOI CMOS transistors and Matlab script for generating look-up table

This tutorial provides procedure and Matlab scripts that can be used to transform Cadence Spectre simulation data in Matlab based look-up table. The look-up data can then be used for systematic circuit design in Matlab, eg. for a g_m/I_D-based design flow, to compare transistor small-signal and circuit parameters in different corners or even to estimate difference between transistor schematic and post-layout model. Possibilities are endless.

The procedure presented here is the upgrade of their work done in 65nm TSMC technology for 28nm UTBB FD-SOI technology. The main structural difference between these two technologies is additional terminal for back gate in 28nm FD-SOI. The test-benches and explanations are done for low-voltage threshold type of 28nm UTBB FD-SOI transistor.