Can SMTs be used to overcome the I/O bottleneck in HPC applications?
Authors/Creators
- 1. University of Edinburgh
Description
I am investigating the hypothesis that the Simultaneous Multi-Threading (SMT) cores of an HPC system could be used as an I/O server which could carry out the I/O tasks while the client process keeps on computing to improve the effective I/O bandwidth for a user. I developed a framework which can implement an I/O server, by creating dedicated ranks which process the client ranks’ I/O requests in parallel with the computation to abstract the complexities away from the user.
I tested a range of computational kernels such as the STREAM, HPCG benchmarks and finally the FEniCSx PDE solver, a real-life HPC application. It was found that the effectiveness of the SMT cores to improve the I/O performance was seen beyond 64 compute nodes on ARCHER2 using STREAM as the computational kernel.
Files
Poster-sbhardwaj.pdf
Files
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Additional details
Funding
- UK Research and Innovation
- Strategic Partnership in Computational Science for Advanced Simulation and Modelling of Engineering Systems - ASiMoV EP/S005072/1