FPGA based Decision Tree Classification Accelerator for Networking Applications

Packet Classification is used by networking applications to sort packets into flows by comparing their header with a
list of rules such that packets will be placed in the flow based on matched rule. With advance in technology and larger storage
capacity available in computers, large amount of data needs to be processed leading to larger classification times. Decision tree
Classification (DTC) is a known classifier for packet classification. In this paper, a hardware accelerator for DTC implementation
is proposed which consists of parallel nodes independently processing data from a streaming source.