Published September 30, 2023 | Version CC BY-NC-ND 4.0
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A Pass Transistor based Multifunction Gate Design

Authors/Creators

  • 1. Department of Electrical and Computer Engineering, University of Texas at Dallas, Dallas, USA.

Description

This study introduces a gate design that uses pass transistor switches and enables the implementation of all necessary logic gates with a single structure. This gate design can be used for efficient circuit resizing and creating secure obfuscated circuits. This work also presents simulation results that demonstrate the effectiveness of the gate in performing various logic gate operations.

Notes

Lattice Science Publication (LSP) © Copyright: All rights reserved.

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Is cited by
Journal article: 2582-8843 (ISSN)

References

  • Rohit Lorenzo and Saurabh Chaudhury. Review of circuit level leakage minimization techniques in cmos vlsi circuits. IETE Technical review, 34(2):165–187, 2017. https://doi.org/10.1080/02564602.2016.1162116
  • Rajesh Kumar Datta. Implementing boolean functions with switching lattice networks, 2022. https://doi.org/10.48550/arXiv.2202.09551
  • Rajesh Datta. Cvm: Crossbar-based circuit verification through modeling. 2023. https://doi.org/10.20944/preprints202303.0397.v1
  • Ithihasa Reddy Nirmala, Deepak Vontela, Swaroop Ghosh, and Anirudh Iyengar. A novel threshold voltage defined switch for circuit camouflaging. In 2016 21th IEEE European Test Symposium (ETS), pages 1–2. IEEE, 2016.

Subjects

ISSN: 2582-8843 (Online)
https://portal.issn.org/resource/ISSN/2582-8843#
Retrieval Number:100.1/ijvlsid.B1222093223
https://www.ijvlsi.latticescipub.com/portfolio-item/B1222093223/
Journal Website: www.ijvlsi.latticescipub.com
https://www.ijvlsi.latticescipub.com/
Publisher: Lattice Science Publication (LSP)
https://www.latticescipub.com/