Dependability Benchmarking of soft-core processors at different levels of design representation: MC8051, AVR and Microblaze as a case study

The dataset contains the results of fault injection experiments carried out for dependability benchmarking of three soft-core processors (MC8051, AVR, Microblaze) at three design representation levels:

1. Register-transfer level (RTL) HDL model;
2. Implementation-level HDL model (defined in the basis of Xilinx simprim library);
3. Level of FPGA prototype (Xilinx Zynq XC7Z020);

Fault injection experiments have been carried out by means of DAVOS toolkit (https://github.com/IlyaTuzov/DAVOS). 

Installation guide is attached (readme.pdf in the package root directory).