Published September 14, 2016 | Version v1
Conference paper Open

Versat, a Runtime Partially Reconfigurable Coarse-Grain Reconfigurable Array using a Programmable Controller

  • 1. INESC-ID Lisboa / Técnico Lisboa

Description

Integrating a Coarse-Grain Reconfigurable Array (CGRA) in a System-on-Chip (SoC) is often a challenging endeavor, especially because of software integration issues. In this paper we show that a runtime partially reconfigurable CGRA
with a most basic controller can be used as an accelerator by any embedded processor with minimal changes to the original software. The CGRA itself is easy to program and hides all its specificities like reconfiguration and data transfers from the host processor. Yet, it is capable of implementing rather complex kernels, which makes the integration job easier. We propose a CGRA architecture and a programing paradigm to support runtime partial  reconfiguration. Experimental results are presented.

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