Published September 19, 2019
| Version v1
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Implementation of DVFS Technique for Processor Power and Temperature Reduction
Authors/Creators
- 1. Dr.Ambedkar Institute of Technology, Bengaluru, Karnataka, India
Description
In the world, 70−80% of the people directly or indirectly depend on battery operated devices like mobile phone, Electronic tablets, laptops etc. We expect these systems to run at high frequency to complete the tasks as quickly as possible because of this high frequency, system consumes high power this leads to quick battery drain out and increases in systems temperature. So, we are using dynamic voltage and frequency scaling (DVFS) to achieve goal of temperature reduction and energy saving. The Xilinx simulation environment confirms the theory.
Files
(1-9)CE IMPLEMENTATION OF DVFS TECHNIQUE-format.pdf
Additional details
References
- Bunescu, Ahmed Louri (2018), "LEAD: Learning-enabled Energy-Aware Dynamic Voltage/frequency scaling in NoCs",
- Mayuri Digalwar, Praveen Gahukar, Sudeept Mohan (2018), "Energy Efficient Real Time Scheduling on Multi-core Processor with Voltage Islands",
- Alankar V Umdekar, Arijit Nath, Shirshendu Das, Hemangee K Kapoor (2018), "Dynamic Thermal Management by using Task Migration in Conjunction with Frequency Scaling for Chip Multiprocessors", IIT Guwahati
- Narender Kumar, Munish Rattan (2015), "Implementation of Embedded RISC Processor with Dynamic Power Management for Low-Power Embedded system on SOC",
- Racho Marinov Ivanov, Lubomir Valeriev Bogdanov (2013), "Dynamic Frequency Scaling in Embedded Systems",
Subjects
- Nursing
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