Published August 16, 2019 | Version v1
Dataset Open

Simulation of single cell read and parallel read for a 1T1R and a pseudo-crossbar memristor array

Authors/Creators

  • 1. Rheinisch-Westfälische Technische Hochschule Aachen

Description

Dataset: simulation of single cell read and parallel read for a 1T1R and a pseudo-crossbar memristor array (Deliverable D4.2 "Initial memristor crossbar based logic/arithmetic and memory designs and models", Fig.13, H2020 Project MNEMOSENE)

Files

Files (614.7 kB)

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md5:301dff111a95495ca767243af91d78aa
66.8 kB Download
md5:e8a85c043450c10210f90342017c41cf
290.2 kB Download
md5:e632d0275469e83223dc1ca478f60549
72.4 kB Download
md5:eb19191744e02bb2b134c88690a94529
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md5:36dfabe4f3ea4fc498fa2bb3a2e520c2
66.9 kB Download

Additional details

Funding

European Commission
MNEMOSENE - Computation-in-memory architecture based on resistive devices 780215