Iontronic memristor logic gate voltage curves

Input and output voltages, as well as simulation parameters for logic gates based on iontronic memristors and shinriki-inspired oscillators.

Data was generated with the simulation code code.

Data is stored as .jld2-files. It julia data structures in a subset of the HDF5 specification.

Data for voltage current curves of single memristors for 0.4Hz 40Hz and 4000Hz driving frequency is in the directory memristor.

Oscillation data for single memriki oscillators can be found in the directory dynamics. It shows simples oscillation, a subharmonic response, and chaotic behavior, depending on the driving frequency and a tunable resistance.

To further analyze the the dynamics, data for the recurrences voltages of the output voltage, after each period of the input voltage can be found in chaos-sweeps for the memristive circuit and a circuit where the memristors are replaced with resistors.

The the single-gates directory contains input output voltage curves for XOR and NAND (pre) logic gates. 

Voltage input output curves for AND and OR gates comprised from three NAND gates.

100 iterations of all logic levels for all the implemented logic gates can be found in the repeatability directory.